1. Field of the Invention
The invention relates to a method of transmitting data from a digital color decoder, which decodes a digital color picture signal, to another signal processing unit. The invention also relates to an arrangement for performing said method.
In television technology color decoders are used to decode color information present in a coded form in a picture signal and to furnish this information for further signal processing, particularly for picture display. Such a color decoder particularly supplies the picture signal data as output signals. However, further control data may also be transmitted to other signal processing units.
2. Summary of the Invention
It is an object of the invention to further develop such a transmission method in such a way that subsequent signal processing units can further process the decoded digital color picture signal in a simpler manner.
According to the invention, this object is achieved in that at least a first and a second digital signal are serially transmitted in one signal from the decoder to the signal processing unit, in that the first digital signal is dependent on the instantaneous value of a clock frequency used in the decoder, with which frequency the digital signal is processed in the decoder, and in that the second digital signal is dependent on the instantaneous value of a chrominance subcarrier frequency generated in the decoder, which frequency is used for color decoding.
For further processing the digital picture signal decoded by the digital color decoder, i.e. for further processing its time-discrete sampling values, it is particularly advantageous to have the sampling clock available, or the clock with which this signal has been further processed. This particularly applies when this clock fluctuates with respect to time, for example when the picture signal originates from a video recorder which supplies the picture signal at a fluctuating horizontal frequency.
The two digital signals which, combined to one signal, are consecutively transmitted serially in one signal from the decoder to a subsequent signal processing unit, supply the two essential dam about the color picture signal, viz. particularly its clock frequency or the clock frequency with which the signal is processed in the decoder, and the instantaneous value of the chrominance subcarrier frequency generated in the decoder, with which the color decoding is effected in the decoder. By transmitting these two data to subsequent signal processing units, fluctuating values of these two frequencies are known to the subsequent signal processing unit and can be taken into account accordingly.
The subsequent signal processing unit may be, for example, a television apparatus used for displaying the picture signal. However, in recent years digital color decoders have also been used for supplying the decoded digital color picture signal to a computer in which it can be further processed or at least partly processed. The picture signal thus processed is then applied again to a digital coder which retransforms it to a color picture signal of the desired transmission standard. This processing operation by a computer is, however, only effected temporarily so that during other periods of time the digital color picture signal supplied by the color decoder is directly applied to the coder in which it is coded again. Particularly during these periods of time it is very advantageous for the coder that the information about the clock frequency used in the decoder, as well as the chrominance subcarrier frequency used is available, because these two values need not be produced again in the coder and particularly because in this way also fluctuating values of these two frequencies are known to the coder which could hardly gain these frequencies. Thus, in this way a much more precise and particularly low-noise coding of the decoded digital color picture signal can be realized in the coder.
In accordance with an embodiment of the invention, the clock frequency used in the decoder is dependent on the horizontal frequency of the digital color picture signal. Particularly in this case fluctuations of the horizontal frequency may occur in the picture signal when supplied by a video recorder or similar apparatus. These horizontal frequency fluctuations result in corresponding fluctuations of the clock frequency. If these clock frequency fluctuations are, for example, not known to a subsequent coder or a deflection processor, these devices would further process the signal with an incorrect time base, which would directly result in a disturbance of the picture. Due to the transmission according to the invention of the relevant data, the coder can fully take over the fluctuating clocks and process the picture signal without any disturbance.
In accordance with a further embodiment of the invention, the PAL or SECAM switching phase is transmitted as a third digital signal. In color picture signals of the PAL or SECAM standard, it is also very advantageous to know the linealternating switching phase. The signal processing unit arranged behind the decoder can then advantageously be informed of this switching phase as a third digital signal, which can be taken into account accordingly during the color coding process.
In accordance with a further embodiment of the invention, a value is transmitted per picture line of the digital color picture signal for each one of the digital signals to be transmitted. Since the values of the two or three digital signals vary only once per picture line, one single transmission within this period of time will be sufficient.
In accordance with a further embodiment of the invention, the signal processing unit receiving the transmitted digital signals is a digital color coder which at least temporarily recodes the decoded picture signal supplied by the decoder.
As already explained hereinbefore, the method according to the invention may be particularly used to advantage for a coder in the form of a signal processing unit, because the digital signals transmitted in accordance with the invention contribute to a very clear enhancement of the picture quality of the color picture signal recoded by the coder. This is all the more true as the digital signals required for the coder are present in the decoder anyway and are to be transmitted to the coder only.
In accordance with a funher embodiment of the invention, the signal processing unit is a deflection processor of a picture display device.
Known 100 Hz color television display devices often include a digitally operating color decoder which operates at a clock frequency which is dependent on the horizontal frequency of the picture signal. In the case of fluctuations of the horizontal frequency of the picture signal, the deflection processor may cause disturbances in the display of the picture signal. This is particularly true when the picture signal is supplied by a video recorder and when very strong fluctuations of the horizontal frequency occur at the start and the end of each field due to the change of the video heads in the recorder. As a result of these fluctuations of the horizontal frequency, the deflection processor attempting to adapt to these fluctuations may itself cause additional disturbances so that additional picture disturbances occur at the upper or lower picture edge. The transmission according to the invention of at least the first and the second digital signal enable the deflection processor to directly detect the clock frequencies used and to recognize, and accordingly take into account, fluctuations of these clock frequencies. A kind of synchronization up to the clock frequencies used, or a decoupling is then no longer necessary.
In accordance with a further embodiment of the invention, the first digital signal is an increment signal which is applied to a digital controllable oscillator in a horizontal frequency phase-locked loop provided in the color decoder.
In digital color decoders which operate at a clock frequency which is dependent on the horizontal frequency of the picture signal, a horizontal frequency phase-locked loop is generally provided which is used for generating the clock signal. This phase-locked loop incorporates a controllable oscillator which receives a fixed clock frequency and an increment signal which is directly dependent on the instantaneous value of the horizontal frequency of the picture signal. This increment signal may be advantageously transmitted as the first digital signal to a signal processing unit, because this increment signal is directly dependent on the value of the clock frequency which is generated by the horizontal frequency phase-locked loop for further signal processing in the decoder, and because this increment signal is present in the decoder anyway and thus need not be additionally generated for transmission to the signal processing unit. With reference to the increment signal, the subsequent signal processing unit may directly react to fluctuations of the clock frequency with which the picture signal has been decoded or processed.
In accordance with a further embodiment of the invention, the second transmitted digital signal is a chrominance subcarrier increment signal which is applied to a digital controllable oscillator in a chrominance subcarrier phase-locked loop provided in the color decoder.
Similar considerations as for the first digital signal explained above apply to the second digital signal. Digital color decoders generally have a chrominance subcarrier phase-locked loop whose chrominance subcarrier increment signal can be used as a second digital signal and is a direct measure for the instantaneous value of the chrominance subcarrier frequency with which the color picture signal is decoded in the digital color decoder.
In accordance with a further embodiment of the invention, relating to an arrangement for performing the method, the digital signals to be transmitted and being present in a parallel form in the decoder are applied to a converter arrangement which converts the digital signals into a serial form, while a further converter arrangement is provided which converts the serially received data into parallel data which are applied to the signal processing unit.
As already stated, the values of the first and the second digital signal are present in the decoder anyway and may have to be converted only for the purpose of processing. For example, the above-mentioned increment signals used in the phase-locked loops are present as parallel values. If these increment signals are to be transmitted as a first and a second digital signal, the converter arrangements are provided to convert the signals for transmission in a serial form and to possibly reconvert them into a parallel form again in the signal processing unit. These converter arrangements may be realized in a relatively simple manner by means of shift registers and may be either integrated in the decoder and the signal processing unit or realized outside this unit.
These and other aspects of the invention will be apparent from and elucidated with reference to the embodiments described hereinafter.